Woojin Lee

I am a Masters degree candidate at Computer Architecture and Systems Lab, KAIST School of Computing. I am really grateful to be adviced by Prof. Jeehoon Kang and Prof. Jongse Park. I am interested in designing a new hardware description languages (HDLs) with proper abstractions to elevate productivity.

Contact

• Email: woojin.lee@kaist.ac.kr
• GitHub: woojinnn
• Bibliography: ORCID, DBLP, Google Scholar
• Place: Rm. 4441, Bldg. E3-1, KAIST (+82-42-350-7878)

Education

• (2026, expected) M.S. in Graduate School of AI Semiconductor (AIS). KAIST.

• (2023) B.S. in Computer Science & Electrical Engineering (Double major). KAIST.

Experiences

• Internship, KC-ML2, Sep, 2020 - Feb, 2021.
  • Exploring ML HWs using TVM and Xilinx PYNQ board.
• Internship, FuriosaAI, Jan, 2023 - Feb, 2023.
  • Analyzing the FuriosaAI TCP architecture and examining the viability of HazardFlow HDL for efficient NPU RTL implementation.

Publications

• (PLDI 2024) Modular Hardware Design of Pipelined Circuits with Hazards.
  Minseong Jang, Jung In Rhee, Woojin Lee, Shuangshuang Zhao, Jeehoon Kang.
  ACM SIGPLAN conference on Programming Languages Design and Implementation.
  [paper: doi, local] ​ ​ ​